Which of the following is an advantage of CMOS integrated circuits compared to TTL integrated circuits?
Why CMOS logic uses complementary pairs of P-channel and N-channel MOSFETs, so in either steady logic state one transistor is off and essentially no current flows from supply to ground. Current is drawn mainly during switching transitions to charge and discharge capacitance. TTL uses bipolar transistors with resistive paths that draw steady current whether or not the output is changing, so CMOS is dramatically more power efficient, which also means less heat and longer battery life.
Watch out High power handling is not it: CMOS logic gates are small-signal digital devices, and the choices about RF amplification and power supply regulation describe entirely different analog part families, not a logic family comparison.
CMOS = Complementary MOS = Conserves Milliwatts. Only burns power when it switches.